Memory type of SSD drives

 

Memory type of SSD

The vast majority of SSD drives on the market based on flash memory of the NAND type (there is also flash memory with by the NOR organization, used to store executable code — for example, Bios in PC or OS in phones). Depending on whether how many bits of data (one to five) can be stored in a cell, they are, accordingly, divided into the following types: SLC, MLC, TLC, QLC memory (already in production) and PLC (in development). When the cell placed in the same plane, talk about planar or 2D NAND (old, but until now there is a type of memory cells, SSD), and when they assembled into a three-dimensional structure - about 3D NAND (its individual varieties called V-NAND or BiSC).

SSD: memory types and cell device

How is data stored in electronic systems? How can you force it? to "remember" an electrician? It's quite simple: by transferring the information to a sequence of minimal, simplest units — a bit, each of which can accept only two states - "there is a charge" or "there is no charge". "Yes" or "no", "1" or "0", "true" or "false".

Where and how are these values ​​stored? Any memory cell, be it SLC, MLC, TLC or QLC memory is a microscopic transistor. Essence the work of each transistor (there are a lot of their varieties) is that electricity passes through it, between the drain/collector and by the leaker/emitter, only under certain conditions governed by the filing control current per gate/base. For flash memory are used field (so-called type) transistors with two gates: ordinary (manager) and special (floating).

The gates in these transistors are separated by a layer of dielectric; at applied to the gate voltage generates an electromagnetic field that affects medium between drain and leak. When there is no voltage on the gate, the current does not pass through the transistor, it is conducted.
Unlike the usual one, the second, floating gate is surrounded by a dielectric and has no exits to the outside. So:

• if you record a charge in the floating shutter, it will remain there even if the medium (SSD or flash drive) is de-energized;

• if the charge is opposite to that applied to the control gate, these charges begin to mutually compensate each other, and, as a result, the voltage is applied to the gate, and the current does not flow through the transistor (until those until the voltage exceeds some threshold value).

It turns out that we can store the state of the cell - the same bit: "is charge" or "no charge" while the SSD is powered off; and at any moment - applying voltage to the gate and checking that current flows between the leak and flow, read its meaning.

PLC/QLC/TLC/MLC/SLC — SSD memory differences

What if you need to store two bites in one transistor? Every bit can take the value of "0"/"1" and when these bits are two, then in Such a cell can only be four possible combinations: 00, "01", "10" and "11". In order to store and distinguish one from one one, requires a little more sophisticated work with a cell that takes into account Not only the presence, but also the level of charge in the floating shutter. After all depending on its magnitude to open a transistor we need greater or lower voltage. And that means it will be enough to divide the value that can take the charge at four intervals (and accordingly enter three thresholds), compare them each of the combinations and, sequentially increasing the voltage on the control shutter, find out which A set of bits is in a cell.

But two bits of modern Nand memory are not limited:

• SLC «Single Level Cell» – The oldest type Nand's memory where each cell has one bit of information (in The cells are stored by one of the two values - "0" or "1").

• MLC «Multi Level Cell» — contains two bits information. The number of possible values in such a cell increases to Four - "00", "01", "10", "11", and threshold voltages require three.

• TLC «Triple Level Cell» — Type of memory cells, SSD containing three bites of information. The number of values has increased again twice: 000, 001, 010, 011, 100, 101, 110 and 111. Numeric threshold voltages - seven.

• QLC «Quad-Level Cell» that contains, Accordingly, four bites. Here the number of possible values is already 16: 0000, 0001, 0010, 0011, 0100, 0101, 0110, 0111, 1000, "1001", "1010", "1011", "1100", "1101", "1110", "1111" - and requires 15 threshold voltages.

• PLC «Penta Level Cell - This type of memory flash SSD is only announced before release and will contain 5 bits on cell, number of possible values - 32: 00000, "00001", "00010", "00011", "00100", "00101", "00110", "00111", "01000", "01001", "01010", " "01011", "01100", "01101", "01110", "01111", "10000", "10001", "10010", " "10011", "10100", "10101", "10110", "10111", "11000", "11001", "11010", " "11011", "11100", "11101", "11110", "11111"; Threshold voltages - 31.

Historically the name MLC appeared long before manufacturers thought about further increasing the number of bits on the memory cell SSD. With the advent of TLC and Qlc memory types, it would probably be more logical rename two -level cells, for example, in DLC: After all, all Two- three - and four -headed cells are multi -level, "Multi". But The names did not change the established name. Samsung as a result traditionally uses this terminology in its favor by calling TLC or Qlc chips in their solid state drives by “three-term” (or "Four -tutor") MLC. Of course it is no mlc memory but all the same new-good tlc or Qlc but users are nice and hand itself It is drawn to click on the "Buy" button.

Which is better: TLC or MLC memory? ("More" - not always "better")

We are used to perceiving novelty synonymous with progress. New - so, Necessarily faster, more economical and convenient old. In this regard The evolution of SSD memory types may seem paradoxical. Transition from SLC to MLC, TLC or Qlc, of course, provides an increase in volume and cheaper drives, but reliability, durability and speed at Each adding levels "Swings". Why is it like that?

To begin with, we remember that the main wear of the SSD drive falls on recording and abrasion operations. For recording is provided The potential difference on the control gate and runoff, to clean the cell - on the shutter and leak. And to "reach" to floating shutter through the dielectric layer, the voltage level should be much higher than for Data reading. With each of these actions the dielectric is gradually destroyed, increases the risk of charge leak into adjacent cells, and the transistor itself Some moment fails.

And besides the fact that in multi -level cells SSD by itself the number of such traumatic operations increases (because now on them is not one but two or three or four bites, each of which may change), Additional problems also arise. Increasing “enhancement of recording” is an unpleasant phenomenon when the number of actual recording operations in memory of CSD is noticeable Moreover you need for files transmitted from OS. Enhancement of recording causes, for example, collection of garbage in which the overwriting occurs up -to -date information to a vacanc from unnecessary data (we talked about in the article «SSD controllers»). Oddly enough, the enhancement of the recording is affected and alignment of wear, called, on the contrary, to continue the life of the disk: during it the so -called “Cold Data” (recorded information once, remains practical unchanged) overwrite in blocks previously occupied by "hot" ( often change). And these negative phenomena the more the bits placed in a cell.
SLC-cam-based technology, widespread in SSD on TLC and QLC chips, also leads to enhancement of the recording. When the number cells set on pseudo-SLC cache (in which one bit is written information on three - or quadruple cell) is exhausted then data It is necessary to "compact". And done all this because of overwriting with the subsequent abrasion: It is impossible to simply post a couple of bits in transistor.
and, finally, enlargement of recording and abrasion associated with Error correction. The larger levels we have on one SSD memory cell and threshold voltages, the more virtuoso should be the charge room in floating shutter. Little inaccuracy - and here already instead of "10011" we We have "10010" or "10100". Naturally that after correction is necessary replace correct data into another cell and pages with incorrect values ​​to be cleaned.

with increasing number of levels in cells there are problems with SSD speed. More time is spent on reading data: Now, by sorting threshold voltages, you need to carry out (in the case of QLC-centers) up to 15 attempts to open a transistor. Due to the fact that the controller must accurately distinguish between boundary stresses, its firmware becomes cumbersome and should contain more complex ECC mechanisms (Error corrections) that also slows down the operation of the drive.

Why do manufacturers go to such activities? The answer is obvious. If talk about volume then transition from SLC to MLC memory increases capacity Disk twice, TLC - adds 50% capacity compared to MLC, Qlc - 33% TLC, and PLC has to add 25% capacity compared to QLC. In accordance, disk using QLC memory costs the manufacturer (and, as a result user) much cheaper than SSD drive with MLC cells (SLC SSD with their high cost now can only be found in corporate segment). And a request for increasing the amount of drives and their price accessibility for the segment in priority. And here is the need for high -speed, Very durable disks of modest volumes for high price - much less: as much as the office "workers" and PC for the family, social Communication, training and surfing on the Internet prevail over computers for gamers and highly professional tasks.

What is 3D NAND, V-NAND and BiCS

As you can see what negative consequences have led to pursuit of SSD capacity, the need for large volume drives is and continues to grow. And in this regard the transition from SLC to MLC cells was not at all the first way to increase the capacity of Nand chips and, accordingly, solid -state drives. The most obvious way is to improve process: reducing the size of cells so that they can be placed in the crystal as much as possible. From 80-90 nm in 2004 manufacturers have managed To reach 15-16 nm by 2015-and at that time it was the limit. In the future reducing the size in cells would have too little electrons for to ensure reliable reading and the charge could flow from one cell to another.

The answer to this call was first MLC and then TLC Chop of memory. But it was obvious that it was only a temporary exit from situation. Cannot be infinitely added and add levels: Technologies SSD controllers will cease to cope with the accuracy of recorded and reading data and occurring errors, and each extra bit The cell lowers speed and shortens the life of the drives. And though manufacturers now announce the release of PLC chips, whether the future is in even more the number of levels is still unknown.

the solution came as 3D-Nand technology-transition from a two -dimensional, planar array of cells to three -dimensional placement and Increasing the capacity by increasing the height of the crystal. Pioneer of this the method turned out Samsung from 24-size and then 32-and 48-word V-Nand (Vertical Nand). Then the Intel and Micron followed her footsteps: However, their 32-layer memory lost by the characteristics of the V-Nand, and Only the second, 64-layer generation of memory, proved to be competitive. Toshiba (now - Kioxia) and Sandisk, which have united for jointly developing a three -dimensional Bics 3D Nand product, preferred not to force events, but to wait until the production of 3D memory becomes profitable, and came to the mass market already at the stage of 48 - and 64 -layer chips.

The transition to the "third dimension" has allowed not only to increase the number cells in the Nand's crystal, but also if desired to expand the distance between by them, as well as stop balancing on the border of the "most thin technical process", Returning to reliable in operation and cheap in manufacturing technologies over 20 nm. A new technology has positively affected SSD disks resource is also due to the ability to raise the amount surplus space (for service operations and replacement has failed memory blocks).

and besides the transition to vertical accommodation, most manufacturers rethinked the cell structure itself.
First, to change traditional transistors with floating shutter their new improved variety came - memory with a trap of charge, CTF (Charge Trap Flash). Unlike floating shutter, was a conductor, Surrounded by a dielectric, trap (charge storage area) - by itself to itself consists of a thin film of silicon nitride, insulator, capable, nevertheless, hold electrons. The use of such technology allows to minimize charge leak and, accordingly, to increase Reliability of storage of data at the same time with the ability to use thin technical processes. To charge such a cell is so high voltage as for floating shutter and this significantly increases the cycles resource SSD overwriting. And as a result of reducing the number of technological operations (approximately 20%) and increased output fit cells, the cost of production decreases.
second, has changed Cell architecture. Now they have the shape of a cylinder where the outer layer - the manager of the shutter, "wrapped" around the charge trap, and in the center The only vertical stack from the cells of the channel passes. By The account of such a structure has decreased the impact of cells on the nearest "neighbors" characteristic of planar Nand, which allowed to simplify the recording algorithms and Thus to accelerate it.

As a result of 2013, the V-Nand architecture allowed perform reading and record operations twice as fast as planarney Nand, and could work 10 times longer while consuming twice less energy.

Features 3D-Nand different manufacturers:

• Intel and Micron remained last supporters Use of floating shutter transistors. Management elements in Micron memory is located under Nand cells that allows Significantly reduce the area of chips. After the partnership is stopped with Intel, Micron has switched to its new developments to transistors with a trap of a charge (CTF) that should be likely to lead to a serious improvement characteristics and performance of chips. In turn, Intel came to the decision completely leave the production of Nand and sold their SK Hynix assets.

• BiCS (Bit Cost Scalable) 3D Nand from Toshiba and Sandisk (WD) differs in an interesting solution: the cells of these chips are grouped in U-shaped structure and controls are located in the upper area Crystal. According to manufacturers, this should reduce their heating that causes recording and reading errors and will allow maximum speed and reliability of work.

• Sk Hynix chips are built on the basis of transistors with a trap of a charge, But in the design the manufacturer adheres to the same scheme as Micron, removing the control elements under the Nand cells.

However, 3D-Nand technology has its complexities. Multilayer (in 2021 announced the issue of 176-layer Nand memory chips and the company Sk Hynix and quite promises to reach 600 layers in the future) involves incredibly thin work to combine layers and the treatment of through channels so that they pass strictly vertically, be the same diameter throughout their length and crossed out the appropriate elements in each layer. The smallest mistake is and in the “best” SSD memory chips cease to match the design Features, and at worst - will increase the marriage. One way Fighting this is a bond: a combination of, for example, two 48-layer chips So that they work as a single 96-layer chip. But this method alone by itself requires a very accurate coincidence of the borders in the obtained “Sandwich” although it is better off paying compared to an extension of a large the number of layers within one crystal.

Which type of memory SSD is better?

So, which type of SSD memory chips choose when buying a drive? What type of SSD flash memory will be optimal for the end user? What Better - MLC or TLC?

If you take any general trends then MLC will be better (faster and More durable, though more expensive) than TLC, TLC is better than Qlc. 3D is better planar chips, up to the fact that 3D tlc is highly likely to all The characteristics can exceed 2D MLC. Product development trends Intel and Micron, built on floating shutter transistors, It seems clearly indicate that you should prefer memory from trap of the charge (all other manufacturers of 3D Nand and Micron, starting with 128-layer chips; How to determine the type of memory SSD using the application Flash Tool we described in detail in the article «How to determine the SSD controller»). And, apparently, it is impossible to say unequivocally whether V-nand is better from Samsung, Bics from Toshiba/Sandisk or less often there are chips from Hynix.

but first of all it should be borne in mind that the choice of SSD on a particular chips, whether or not first of all depends on the budget and the sphere Using a computer. If gamers and professionals that use PC for high -performance tasks, makes sense to put in Purchase 3D MLC SSD and for a medium but powerful desktop The best will be a ligament from a small but high -quality, solid on 3D TLC chips and HDD for file repository, then in low-cost laptops “for office and school ”an ideal solution may just be quite capacious SSD on QLC chips that is enough for a system, apps and files user. A critical parameter that characterizes the SSD resource. It refers to the maximum number of terabytes that can be written on a drive. The higher the TBW, the more live the disk and the longer it will be able to work uninterrupted. All 760p series models have a 288 TBW resource and 660p has only 100 TBW. Almost three times the difference.

 DWPD (Drive Writes Per Day). This reliability indicator indicates how many times a day you can overwrite the entire drive, and is calculated by the formula:

DWPD = TBW / 0,512 * 365 * 5

Where 0.512 - storage capacity in terabytes;
365 — number of days per year;
5 — number of years of warranty.


 DWPD More objective, because the calculation takes into account the time during which the manufacturer undertakes to solve problems with the drive free of charge. DWPD is 0.1 for the QLC and 0.32 model for TLC. In other words, in this example, QLC can completely overwrite 50 GB every day - this is its normal mode. Given that at the same price, QLC drives are above MLC, the average "Internet typewriter" user is unlikely With a lot of technical difficulties that have manifested in QLC more vividly than TLC. In particular, QLC has less access to recording and reading, a lower resource, a higher WAF coefficient (more about it below). Let's take a closer look at the main difficulties and methods of solving them.